HALDLS
systime.h
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1 #pragma once
2 #include "haldls/vx/genpybind.h"
3 #include "haldls/vx/systime.h"
4 
5 namespace haldls::vx::v2 GENPYBIND_TAG_HALDLS_VX_V2 {
6 
7 using SystimeSyncBase GENPYBIND(visible) = haldls::vx::SystimeSyncBase;
8 using SystimeSync GENPYBIND(visible) = haldls::vx::SystimeSync;
9 
10 } // namespace haldls::vx::v2
haldls::vx::SystimeSyncBase
Container for configuring the initial counter value of the systime counter in the chip and in the FPG...
Definition: systime.h:28
haldls::vx::SystimeSync
Container for syncronization of chip and FPGA systime.
Definition: systime.h:96
GENPYBIND_TAG_HALDLS_VX_V2
#define GENPYBIND_TAG_HALDLS_VX_V2
Definition: genpybind.h:5
haldls::vx::v3::SystimeSyncBase
haldls::vx::SystimeSyncBase SystimeSyncBase
Definition: systime.h:7
haldls::vx::v3::SystimeSync
haldls::vx::SystimeSync SystimeSync
Definition: systime.h:8