pygrenade_vx.signal_flow.SynapseArrayViewSparse

class pygrenade_vx.signal_flow.SynapseArrayViewSparse

Bases: pygrenade_common.PartitionedVertex

__init__(*args, **kwargs)

Overloaded function.

  1. __init__(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse, synram: pyhalco_hicann_dls_vx_v3.SynramOnDLS, rows: list[pyhalco_hicann_dls_vx_v3.SynapseRowOnSynram], columns: list[pyhalco_hicann_dls_vx_v3.SynapseOnSynapseRow], synapses: list[_pygrenade_vx_signal_flow.SynapseArrayViewSparse.Synapse], chip_on_connection: _pygrenade_vx_common.ChipOnConnection, time_domain: pygrenade_common.TimeDomainOnTopology, execution_instance_on_executor: pygrenade_common.ExecutionInstanceOnExecutor) -> None

Construct synapse array view.

  1. __init__(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse, arg0: _pygrenade_vx_signal_flow.SynapseArrayViewSparse) -> None

Methods

__init__(*args, **kwargs)

Overloaded function.

copy(self)

get_input_ports(self)

get_output_ports(self)

get_time_domain(self)

move(self)

valid_edge_from(self, source, edge)

valid_input_port_data(self, …)

Attributes

chip_on_connection

columns

rows

synapses

synram

class Parameterization

Bases: pygrenade_common.PortData

copy(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse.Parameterization)pygrenade_common.PortData
property labels
move(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse.Parameterization)pygrenade_common.PortData
property weights
class ParameterizationPortType

Bases: pygrenade_common.VertexPortType

copy(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse.ParameterizationPortType)pygrenade_common.VertexPortType
move(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse.ParameterizationPortType)pygrenade_common.VertexPortType
class Synapse

Bases: pybind11_builtins.pybind11_object

property index_column
property index_row
property chip_on_connection
property columns
copy(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse)pygrenade_common.Vertex
get_input_ports(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse)list[pygrenade_common.Vertex.Port]
get_output_ports(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse)list[pygrenade_common.Vertex.Port]
get_time_domain(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse)Optional[pygrenade_common.TimeDomainOnTopology]
move(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse)pygrenade_common.Vertex
property rows
property synapses
property synram
valid_edge_from(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse, source: pygrenade_common.Vertex, edge: pygrenade_common.Edge)bool
valid_input_port_data(self: _pygrenade_vx_signal_flow.SynapseArrayViewSparse, input_port_on_vertex: int, data: pygrenade_common.PortData)bool