HALDLS
phy.h
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1 #pragma once
2 #include <array>
3 #include <iosfwd>
4 
5 #include "halco/common/geometry.h"
6 #include "halco/common/typed_array.h"
7 #include "halco/hicann-dls/vx/highspeed_link.h"
8 #include "haldls/cerealization.h"
9 #include "haldls/vx/genpybind.h"
10 #include "haldls/vx/traits.h"
11 #include "hate/visibility.h"
12 
13 namespace halco::hicann_dls::vx {
14 class OmnibusAddress;
15 class OmnibusChipOverJTAGAddress;
16 } // namespace halco::hicann_dls::vx
17 
18 namespace haldls {
19 namespace vx GENPYBIND_TAG_HALDLS_VX {
20 
21 namespace detail GENPYBIND_MODULE {
22 
26 class GENPYBIND(visible) PhyConfigBase
27 {
28 public:
29  typedef std::true_type is_leaf_node;
30 
31  struct GENPYBIND(inline_base("*")) ManualDelay
32  : public halco::common::detail::RantWrapper<ManualDelay, uint_fast32_t, 15, 0>
33  {
34  constexpr explicit ManualDelay(uintmax_t const val = 0) : rant_t(val) {}
35  };
36 
37  struct GENPYBIND(inline_base("*")) VBias
38  : public halco::common::detail::RantWrapper<VBias, uint_fast32_t, 7, 0>
39  {
40  constexpr explicit VBias(uintmax_t const val = 0) : rant_t(val) {}
41  };
42 
43  struct GENPYBIND(inline_base("*")) DebugOutputs
44  : public halco::common::detail::RantWrapper<DebugOutputs, uint_fast32_t, 1, 0>
45  {
46  constexpr explicit DebugOutputs(uintmax_t const val = 0) : rant_t(val) {}
47  };
48 
49  GENPYBIND(getter_for(enable_bit_slip))
50  bool get_enable_bit_slip() const SYMBOL_VISIBLE;
51  GENPYBIND(setter_for(enable_bit_slip))
52  void set_enable_bit_slip(bool value) SYMBOL_VISIBLE;
53 
54  GENPYBIND(getter_for(manual_delay))
55  ManualDelay get_manual_delay() const SYMBOL_VISIBLE;
56  GENPYBIND(setter_for(manual_delay))
57  void set_manual_delay(ManualDelay value) SYMBOL_VISIBLE;
58 
59  GENPYBIND(getter_for(enable_delay_cell_measurement))
60  bool get_enable_delay_cell_measurement() const SYMBOL_VISIBLE;
61  GENPYBIND(setter_for(enable_delay_cell_measurement))
62  void set_enable_delay_cell_measurement(bool value) SYMBOL_VISIBLE;
63 
64  GENPYBIND(getter_for(enable_initialization_master_mode))
65  bool get_enable_initialization_master_mode() const SYMBOL_VISIBLE;
66  GENPYBIND(setter_for(enable_initialization_master_mode))
67  void set_enable_initialization_master_mode(bool value) SYMBOL_VISIBLE;
68 
69  GENPYBIND(getter_for(enable_manual_tx_data_valid_for_init))
70  bool get_enable_manual_tx_data_valid_for_init() const SYMBOL_VISIBLE;
71  GENPYBIND(setter_for(enable_manual_tx_data_valid_for_init))
72  void set_enable_manual_tx_data_valid_for_init(bool value) SYMBOL_VISIBLE;
73 
74  GENPYBIND(getter_for(enable_force_lvds_power_up))
75  bool get_enable_force_lvds_power_up() const SYMBOL_VISIBLE;
76  GENPYBIND(setter_for(enable_force_lvds_power_up))
77  void set_enable_force_lvds_power_up(bool value) SYMBOL_VISIBLE;
78 
79  GENPYBIND(getter_for(enable_force_start))
80  bool get_enable_force_start() const SYMBOL_VISIBLE;
81  GENPYBIND(setter_for(enable_force_start))
82  void set_enable_force_start(bool value) SYMBOL_VISIBLE;
83 
84  GENPYBIND(getter_for(enable_manual_training_mode))
85  bool get_enable_manual_training_mode() const SYMBOL_VISIBLE;
86  GENPYBIND(setter_for(enable_manual_training_mode))
87  void set_enable_manual_training_mode(bool value) SYMBOL_VISIBLE;
88 
89  GENPYBIND(getter_for(enable_ber_loopback))
90  bool get_enable_ber_loopback() const SYMBOL_VISIBLE;
91  GENPYBIND(setter_for(enable_ber_loopback))
92  void set_enable_ber_loopback(bool value) SYMBOL_VISIBLE;
93 
94  GENPYBIND(getter_for(vbias))
95  VBias get_vbias() const SYMBOL_VISIBLE;
96  GENPYBIND(setter_for(vbias))
97  void set_vbias(VBias value) SYMBOL_VISIBLE;
98 
99  GENPYBIND(getter_for(debug_outputs))
100  DebugOutputs get_debug_outputs() const SYMBOL_VISIBLE;
101  GENPYBIND(setter_for(debug_outputs))
102  void set_debug_outputs(DebugOutputs value) SYMBOL_VISIBLE;
103 
104  GENPYBIND(getter_for(enable_transmission_without_idls_pattern))
105  bool get_enable_transmission_without_idle_pattern() const SYMBOL_VISIBLE;
106  GENPYBIND(setter_for(enable_transmission_without_idls_pattern))
107  void set_enable_transmission_without_idle_pattern(bool value) SYMBOL_VISIBLE;
108 
109  GENPYBIND(getter_for(enable_clock_pre_alignment))
110  bool get_enable_clock_pre_alignment() const SYMBOL_VISIBLE;
111  GENPYBIND(setter_for(enable_clock_pre_alignment))
112  void set_enable_clock_pre_alignment(bool value) SYMBOL_VISIBLE;
113 
114  GENPYBIND(getter_for(enable_des_recal))
115  bool get_enable_des_recal() const SYMBOL_VISIBLE;
116  GENPYBIND(setter_for(enable_des_recal))
117  void set_enable_des_recal(bool value) SYMBOL_VISIBLE;
118 
119  GENPYBIND(getter_for(enable_loopback_en))
120  bool get_enable_loopback_en() const SYMBOL_VISIBLE;
121  GENPYBIND(setter_for(enable_loopback_en))
122  void set_enable_loopback_en(bool value) SYMBOL_VISIBLE;
123 
124  GENPYBIND(getter_for(enable_auto_init))
125  bool get_enable_auto_init() const SYMBOL_VISIBLE;
126  GENPYBIND(setter_for(enable_auto_init))
127  void set_enable_auto_init(bool value) SYMBOL_VISIBLE;
128 
129  bool operator==(PhyConfigBase const& other) const SYMBOL_VISIBLE;
130  bool operator!=(PhyConfigBase const& other) const SYMBOL_VISIBLE;
131 
132  GENPYBIND(stringstream)
133  friend std::ostream& operator<<(std::ostream& os, PhyConfigBase const& config) SYMBOL_VISIBLE;
134 
135 protected:
136  PhyConfigBase() SYMBOL_VISIBLE;
137 
138  friend class cereal::access;
139  template <typename Archive>
140  void cerealize_impl(Archive& ar) SYMBOL_VISIBLE;
141 
142  uint32_t pack() const SYMBOL_VISIBLE;
143  void unpack(uint32_t value) SYMBOL_VISIBLE;
144 
145  bool m_enable_bit_slip;
146  ManualDelay m_manual_delay;
147  bool m_enable_delay_cell_measurement;
148  bool m_enable_initialization_master_mode;
149  bool m_enable_manual_tx_data_valid_for_init;
150  bool m_enable_force_lvds_power_up;
151  bool m_enable_force_start;
152  bool m_enable_manual_training_mode;
153  bool m_enable_ber_loopback;
154  VBias m_vbias;
155  DebugOutputs m_debug_outputs;
156  bool m_enable_transmission_without_idle_pattern;
157  bool m_enable_clock_pre_alignment;
158  bool m_enable_des_recal;
159  bool m_enable_loopback_en;
160  bool m_enable_auto_init;
161 };
162 
163 } // namespace detail
164 
165 
169 // FIXME: Instead of normal public inheritance we want CRTP here, which is not possible due to
170 // python wrapping issues, the properties don't show up in the derived class.
171 class SYMBOL_VISIBLE GENPYBIND(visible) PhyConfigFPGA : public detail::PhyConfigBase
172 {
173 public:
174  typedef halco::hicann_dls::vx::PhyConfigFPGAOnDLS coordinate_type;
175 
177  PhyConfigFPGA() SYMBOL_VISIBLE;
178 
179  bool operator==(PhyConfigFPGA const& other) const SYMBOL_VISIBLE;
180  bool operator!=(PhyConfigFPGA const& other) const SYMBOL_VISIBLE;
181 
182  GENPYBIND(stringstream)
183  friend std::ostream& operator<<(std::ostream& os, PhyConfigFPGA const& config) SYMBOL_VISIBLE;
184 
185  static size_t constexpr config_size_in_words GENPYBIND(hidden) = 1;
186  static std::array<halco::hicann_dls::vx::OmnibusAddress, config_size_in_words> addresses(
187  coordinate_type const& word) SYMBOL_VISIBLE GENPYBIND(hidden);
188  std::array<fisch::vx::word_access_type::Omnibus, config_size_in_words> encode() const
189  SYMBOL_VISIBLE GENPYBIND(hidden);
190  void decode(std::array<fisch::vx::word_access_type::Omnibus, config_size_in_words> const& data)
191  SYMBOL_VISIBLE GENPYBIND(hidden);
192 
193 private:
194  friend class cereal::access;
195  template <typename Archive>
196  void serialize(Archive& ar, std::uint32_t const version) SYMBOL_VISIBLE;
197 };
198 
199 EXTERN_INSTANTIATE_CEREAL_SERIALIZE(PhyConfigFPGA)
200 
201 namespace detail {
202 
203 template <>
204 struct BackendContainerTrait<PhyConfigFPGA>
205  : public BackendContainerBase<PhyConfigFPGA, fisch::vx::word_access_type::Omnibus>
206 {};
207 
208 } // namespace detail
209 
210 
214 // FIXME: Instead of normal public inheritance we want CRTP here, which is not possible due to
215 // python wrapping issues, the properties don't show up in the derived class.
216 class GENPYBIND(visible) PhyConfigChip : public detail::PhyConfigBase
217 {
218 public:
219  typedef halco::hicann_dls::vx::PhyConfigChipOnDLS coordinate_type;
220 
222  PhyConfigChip() SYMBOL_VISIBLE;
223 
224  bool operator==(PhyConfigChip const& other) const SYMBOL_VISIBLE;
225  bool operator!=(PhyConfigChip const& other) const SYMBOL_VISIBLE;
226 
227  GENPYBIND(stringstream)
228  friend std::ostream& operator<<(std::ostream& os, PhyConfigChip const& config) SYMBOL_VISIBLE;
229 
230  static size_t constexpr write_config_size_in_words GENPYBIND(hidden) = 1;
231  static size_t constexpr read_config_size_in_words GENPYBIND(hidden) = 0;
232  static std::array<halco::hicann_dls::vx::JTAGPhyRegisterOnDLS, write_config_size_in_words>
233  write_addresses(coordinate_type const& word) SYMBOL_VISIBLE GENPYBIND(hidden);
234  static std::array<halco::hicann_dls::vx::JTAGPhyRegisterOnDLS, read_config_size_in_words>
235  read_addresses(coordinate_type const& word) SYMBOL_VISIBLE GENPYBIND(hidden);
236  std::array<fisch::vx::word_access_type::JTAGPhyRegister, write_config_size_in_words> encode()
237  const SYMBOL_VISIBLE GENPYBIND(hidden);
238  void decode(
239  std::array<fisch::vx::word_access_type::JTAGPhyRegister, read_config_size_in_words> const&
240  data) SYMBOL_VISIBLE GENPYBIND(hidden);
241 
242 private:
243  friend class cereal::access;
244  template <typename Archive>
245  void serialize(Archive& ar, std::uint32_t const version) SYMBOL_VISIBLE;
246 };
247 
248 EXTERN_INSTANTIATE_CEREAL_SERIALIZE(PhyConfigChip)
249 
250 namespace detail {
251 
252 template <>
253 struct BackendContainerTrait<PhyConfigChip>
254  : public BackendContainerBase<PhyConfigChip, fisch::vx::word_access_type::JTAGPhyRegister>
255 {};
256 
257 } // namespace detail
258 
259 
263 class GENPYBIND(visible) CommonPhyConfigFPGA
264 {
265 public:
266  typedef halco::hicann_dls::vx::CommonPhyConfigFPGAOnDLS coordinate_type;
267  typedef std::true_type is_leaf_node;
268 
270  CommonPhyConfigFPGA() SYMBOL_VISIBLE;
271 
272  bool get_enable_phy(halco::hicann_dls::vx::PhyConfigFPGAOnDLS const& coord) const
273  SYMBOL_VISIBLE;
274  void set_enable_phy(halco::hicann_dls::vx::PhyConfigFPGAOnDLS const& coord, bool value)
275  SYMBOL_VISIBLE;
276 
277  bool operator==(CommonPhyConfigFPGA const& other) const SYMBOL_VISIBLE;
278  bool operator!=(CommonPhyConfigFPGA const& other) const SYMBOL_VISIBLE;
279 
280  GENPYBIND(stringstream)
281  friend std::ostream& operator<<(std::ostream& os, CommonPhyConfigFPGA const& config)
282  SYMBOL_VISIBLE;
283 
284  static size_t constexpr config_size_in_words GENPYBIND(hidden) = 1;
285  static std::array<halco::hicann_dls::vx::OmnibusAddress, config_size_in_words> addresses(
286  coordinate_type const& word) SYMBOL_VISIBLE GENPYBIND(hidden);
287  std::array<fisch::vx::word_access_type::Omnibus, config_size_in_words> encode() const
288  SYMBOL_VISIBLE GENPYBIND(hidden);
289  void decode(std::array<fisch::vx::word_access_type::Omnibus, config_size_in_words> const& data)
290  SYMBOL_VISIBLE GENPYBIND(hidden);
291 
292 private:
293  friend class cereal::access;
294  template <typename Archive>
295  void serialize(Archive& ar, std::uint32_t const version) SYMBOL_VISIBLE;
296 
297  halco::common::typed_array<bool, halco::hicann_dls::vx::PhyConfigFPGAOnDLS> m_enable_phy;
298 };
299 
300 EXTERN_INSTANTIATE_CEREAL_SERIALIZE(CommonPhyConfigFPGA)
301 
302 namespace detail {
303 
304 template <>
305 struct BackendContainerTrait<CommonPhyConfigFPGA>
306  : public BackendContainerBase<CommonPhyConfigFPGA, fisch::vx::word_access_type::Omnibus>
307 {};
308 
309 } // namespace detail
310 
311 
315 class GENPYBIND(visible) CommonPhyConfigChip
316 {
317 public:
318  typedef halco::hicann_dls::vx::CommonPhyConfigChipOnDLS coordinate_type;
319  typedef std::true_type is_leaf_node;
320 
322  CommonPhyConfigChip() SYMBOL_VISIBLE;
323 
324  bool get_enable_phy(halco::hicann_dls::vx::PhyConfigChipOnDLS const& coord) const
325  SYMBOL_VISIBLE;
326  void set_enable_phy(halco::hicann_dls::vx::PhyConfigChipOnDLS const& coord, bool value)
327  SYMBOL_VISIBLE;
328 
329  bool operator==(CommonPhyConfigChip const& other) const SYMBOL_VISIBLE;
330  bool operator!=(CommonPhyConfigChip const& other) const SYMBOL_VISIBLE;
331 
332  GENPYBIND(stringstream)
333  friend std::ostream& operator<<(std::ostream& os, CommonPhyConfigChip const& config)
334  SYMBOL_VISIBLE;
335 
336  static size_t constexpr config_size_in_words GENPYBIND(hidden) = 1;
337  static std::array<halco::hicann_dls::vx::OmnibusChipOverJTAGAddress, config_size_in_words>
338  addresses(coordinate_type const& word) SYMBOL_VISIBLE GENPYBIND(hidden);
339  std::array<fisch::vx::word_access_type::OmnibusChipOverJTAG, config_size_in_words> encode()
340  const SYMBOL_VISIBLE GENPYBIND(hidden);
341  void decode(
342  std::array<fisch::vx::word_access_type::OmnibusChipOverJTAG, config_size_in_words> const&
343  data) SYMBOL_VISIBLE GENPYBIND(hidden);
344 
345 private:
346  friend class cereal::access;
347  template <typename Archive>
348  void serialize(Archive& ar, std::uint32_t const version) SYMBOL_VISIBLE;
349 
350  halco::common::typed_array<bool, halco::hicann_dls::vx::PhyConfigChipOnDLS> m_enable_phy;
351 };
352 
353 EXTERN_INSTANTIATE_CEREAL_SERIALIZE(CommonPhyConfigChip)
354 
355 namespace detail {
356 
357 template <>
358 struct BackendContainerTrait<CommonPhyConfigChip>
359  : public BackendContainerBase<
360  CommonPhyConfigChip,
361  fisch::vx::word_access_type::OmnibusChipOverJTAG>
362 {};
363 
364 } // namespace detail
365 
366 
367 class GENPYBIND(visible) PhyStatus
368 {
369 public:
370  typedef halco::hicann_dls::vx::PhyStatusOnFPGA coordinate_type;
371  typedef std::true_type is_leaf_node;
372 
373  PhyStatus() SYMBOL_VISIBLE;
374 
378  struct GENPYBIND(inline_base("*")) CRCErrorCount
379  : public halco::common::detail::BaseType<CRCErrorCount, uint32_t>
380  {
381  constexpr explicit CRCErrorCount(uintmax_t const val = 0) GENPYBIND(implicit_conversion) :
382  base_t(val)
383  {}
384  };
385 
389  struct GENPYBIND(inline_base("*")) OnlineTime
390  : public halco::common::detail::BaseType<OnlineTime, uint32_t>
391  {
392  constexpr explicit OnlineTime(uintmax_t const val = 0) GENPYBIND(implicit_conversion) :
393  base_t(val)
394  {}
395  };
396 
400  struct GENPYBIND(inline_base("*")) RxDroppedCount
401  : public halco::common::detail::BaseType<RxDroppedCount, uint32_t>
402  {
403  constexpr explicit RxDroppedCount(uintmax_t const val = 0) GENPYBIND(implicit_conversion) :
404  base_t(val)
405  {}
406  };
407 
411  struct GENPYBIND(inline_base("*")) RxCount
412  : public halco::common::detail::BaseType<RxCount, uint32_t>
413  {
414  constexpr explicit RxCount(uintmax_t const val = 0) GENPYBIND(implicit_conversion) :
415  base_t(val)
416  {}
417  };
418 
422  struct GENPYBIND(inline_base("*")) TxCount
423  : public halco::common::detail::BaseType<TxCount, uint32_t>
424  {
425  constexpr explicit TxCount(uintmax_t const val = 0) GENPYBIND(implicit_conversion) :
426  base_t(val)
427  {}
428  };
429 
430  GENPYBIND(getter_for(crc_error_count))
431  CRCErrorCount get_crc_error_count() const SYMBOL_VISIBLE;
432  GENPYBIND(setter_for(crc_error_count))
433  void set_crc_error_count(CRCErrorCount value) SYMBOL_VISIBLE;
434 
435  GENPYBIND(getter_for(online_time))
436  OnlineTime get_online_time() const SYMBOL_VISIBLE;
437  GENPYBIND(setter_for(online_time))
438  void set_online_time(OnlineTime value) SYMBOL_VISIBLE;
439 
440  GENPYBIND(getter_for(rx_dropped_count))
441  RxDroppedCount get_rx_dropped_count() const SYMBOL_VISIBLE;
442  GENPYBIND(setter_for(rx_dropped_count))
443  void set_rx_dropped_count(RxDroppedCount value) SYMBOL_VISIBLE;
444 
445  GENPYBIND(getter_for(rx_count))
446  RxCount get_rx_count() const SYMBOL_VISIBLE;
447  GENPYBIND(setter_for(rx_count))
448  void set_rx_count(RxCount value) SYMBOL_VISIBLE;
449 
450  GENPYBIND(getter_for(tx_count))
451  TxCount get_tx_count() const SYMBOL_VISIBLE;
452  GENPYBIND(setter_for(tx_count))
453  void set_tx_count(TxCount value) SYMBOL_VISIBLE;
454 
455  bool operator==(PhyStatus const& other) const SYMBOL_VISIBLE;
456  bool operator!=(PhyStatus const& other) const SYMBOL_VISIBLE;
457 
458  GENPYBIND(stringstream)
459  friend std::ostream& operator<<(std::ostream& os, PhyStatus const& config) SYMBOL_VISIBLE;
460 
461  static size_t constexpr read_config_size_in_words GENPYBIND(hidden) = 5;
462  static size_t constexpr write_config_size_in_words GENPYBIND(hidden) = 0;
463  static std::array<halco::hicann_dls::vx::OmnibusAddress, read_config_size_in_words>
464  read_addresses(coordinate_type const& coord) SYMBOL_VISIBLE GENPYBIND(hidden);
465  static std::array<halco::hicann_dls::vx::OmnibusAddress, write_config_size_in_words>
466  write_addresses(coordinate_type const& coord) SYMBOL_VISIBLE GENPYBIND(hidden);
467  std::array<fisch::vx::word_access_type::Omnibus, write_config_size_in_words> encode() const
468  SYMBOL_VISIBLE GENPYBIND(hidden);
469  void decode(std::array<fisch::vx::word_access_type::Omnibus, read_config_size_in_words> const&
470  data) SYMBOL_VISIBLE GENPYBIND(hidden);
471 
472 private:
473  friend class cereal::access;
474  template <typename Archive>
475  void serialize(Archive& ar, std::uint32_t const version) SYMBOL_VISIBLE;
476 
477  CRCErrorCount m_crc_error_count;
478  OnlineTime m_online_time;
479  RxDroppedCount m_rx_dropped_count;
480  RxCount m_rx_count;
481  TxCount m_tx_count;
482 };
483 
484 EXTERN_INSTANTIATE_CEREAL_SERIALIZE(PhyStatus)
485 
486 namespace detail {
487 
488 template <>
489 struct BackendContainerTrait<PhyStatus>
490  : public BackendContainerBase<PhyStatus, fisch::vx::word_access_type::Omnibus>
491 {};
492 
493 } // namespace detail
494 
495 } // namespace vx
496 } // namespace haldls
haldls::vx::detail::PhyConfigBase
Common base class for PhyConfig of the FPGA- and chip-side PHYs.
Definition: phy.h:27
haldls::vx::detail::PhyConfigBase::is_leaf_node
std::true_type is_leaf_node
Definition: phy.h:29
GENPYBIND_TAG_HALDLS_VX
#define GENPYBIND_TAG_HALDLS_VX
Definition: genpybind.h:4
GENPYBIND_MODULE
#define GENPYBIND_MODULE
Definition: genpybind.h:7
halco::hicann_dls::vx
Definition: arq.h:13