4 #error "Requires CHIP_REVISION"
7 #include "halco/common/iter_all.h"
8 #include "halco/common/typed_array.h"
9 #include "halco/common/typed_heap_array.h"
10 #include "haldls/cerealization.h"
11 #include "haldls/vx/cadc.h"
12 #include "haldls/vx/common.h"
13 #include "haldls/vx/synapse.h"
14 #include "haldls/vx/traits.h"
15 #include "hate/visibility.h"
19 #include <boost/hana/adapt_struct.hpp>
23 #define STR(x) XSTR(x)
25 #define CONCAT(w, x, y, z) STR(ID(w)ID(/)ID(x)ID(/)ID(v)ID(y)ID(/)ID(z))
26 #include CONCAT(haldls,vx,CHIP_REVISION,capmem.h)
27 #include CONCAT(haldls,vx,CHIP_REVISION,correlation.h)
34 #if CHIP_REVISION == 2
35 #define GENPYBIND_TAG_LOLA_VX_VY GENPYBIND_TAG_LOLA_VX_V2
36 #define CHIP_REVISION_STR v2
37 #elif CHIP_REVISION == 3
38 #define GENPYBIND_TAG_LOLA_VX_VY GENPYBIND_TAG_LOLA_VX_V3
39 #define CHIP_REVISION_STR v3
41 #error "Unknown CHIP_REVISION"
45 #undef GENPYBIND_TAG_LOLA_VX_VY
47 #if defined(__GENPYBIND__) or defined(__GENPYBIND_GENERATED__)
48 #include <pybind11/numpy.h>
66 typedef haldls::vx::CADCChannelConfig::Offset
Offset GENPYBIND(visible);
78 bool enable_connect_correlation{
false};
83 bool enable_connect_debug{
false};
88 bool enable_connect_neuron{
false};
95 GENPYBIND(stringstream)
96 friend std::ostream& operator<<(std::ostream& os,
Channel const& config) SYMBOL_VISIBLE;
102 typedef halco::common::typed_array<
Channel, halco::hicann_dls::vx::CADCChannelColumnOnSynram>
105 typedef halco::common::typed_array<
106 haldls::vx::CHIP_REVISION_STR::CapMemCell::value_type,
107 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemBlockOnHemisphere>
116 typedef haldls::vx::CADCConfig::ResetWait
ResetWait GENPYBIND(visible);
117 typedef haldls::vx::CADCConfig::DeadTime
DeadTime GENPYBIND(visible);
118 typedef haldls::vx::CHIP_REVISION_STR::CapMemCell::Value
AnalogValue GENPYBIND(visible);
122 typedef haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig::RampOffsets
OffsetAssignment
148 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemBlockOnHemisphere(0),
149 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemBlockOnHemisphere(1)};
176 GENPYBIND(stringstream)
177 friend std::ostream& operator<<(std::ostream& os,
Ramp const& config) SYMBOL_VISIBLE;
186 typedef haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig::SenseDelay
SenseDelay
188 typedef haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig::ResetDuration
ResetDuration
190 typedef haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig::ResetFallTime
ResetFallTime
192 typedef haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig::ResetMode
ResetMode
194 typedef haldls::vx::CHIP_REVISION_STR::CapMemCell::Value
AnalogValue GENPYBIND(visible);
260 GENPYBIND(stringstream)
261 friend std::ostream& operator<<(std::ostream& os,
Correlation const& config) SYMBOL_VISIBLE;
287 GENPYBIND(stringstream)
294 auto av = parent->py::template class_<
295 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues>(parent,
"AnalogValues");
297 "fill", &::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::fill,
"",
298 parent->py::arg(
"val"));
300 typedef ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::reference (
301 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::*genpybind_at_type)(
302 const ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::key_type&);
305 (genpybind_at_type) &
306 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::at,
307 "", parent->py::arg(
"key"));
310 typedef ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::const_reference (
311 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::*genpybind_at_type)(
312 const ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::key_type&)
316 (genpybind_at_type) &
317 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::at,
318 "", parent->py::arg(
"key"));
321 typedef ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::reference (
322 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::*
323 genpybind_front_type)();
326 (genpybind_front_type) &
327 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::front,
331 typedef ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::const_reference (
332 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::*
333 genpybind_front_type)()
const;
336 (genpybind_front_type) &
337 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::front,
341 typedef ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::reference (
342 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::*
343 genpybind_back_type)();
346 (genpybind_back_type) &
347 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::back,
351 typedef ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::const_reference (
352 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::*
353 genpybind_back_type)()
const;
356 (genpybind_back_type) &
357 ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::back,
361 "__getitem__", &::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::get,
"",
362 parent->py::arg(
"key"), parent->py::return_value_policy::reference);
364 "__setitem__", &::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::set,
"",
365 parent->py::arg(
"key"), parent->py::arg(
"value"));
368 [av](::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues&
self) {
369 return pybind11::make_iterator(
self);
371 parent->py::template keep_alive<0, 1>());
375 [](::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues
const&
self) {
376 return ::halco::common::detail::to_numpy(
self);
380 [](::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues&
self,
381 pybind11::array
const& array) { ::halco::common::detail::from_numpy(
self, array); });
383 parent->py::template init<
384 const ::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues&>(),
386 av.def(parent->py::template init<>(),
"");
387 av.def_property_readonly(
388 "size", parent->py::cpp_function(
389 &::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::size));
390 av.def_property_readonly(
392 parent->py::cpp_function(
393 &::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::max_size));
394 av.def_property_readonly(
395 "empty", parent->py::cpp_function(
396 &::lola::vx::CHIP_REVISION_STR::CADCReadoutChain::AnalogValues::empty));
399 friend class haldls::vx::detail::VisitPreorderImpl<CADCReadoutChain>;
409 typedef haldls::vx::CADCSampleQuad::Value
Value GENPYBIND(visible);
411 typedef halco::common::typed_heap_array<Value, halco::hicann_dls::vx::SynapseOnSynapseRow>
426 GENPYBIND(stringstream)
427 friend std::ostream& operator<<(std::ostream& os,
CADCSampleRow const& row) SYMBOL_VISIBLE;
440 typedef haldls::vx::CADCSampleQuad::Value
Value GENPYBIND(visible);
442 typedef halco::common::typed_heap_array<
443 halco::common::typed_array<Value, halco::hicann_dls::vx::SynapseOnSynapseRow>,
444 halco::hicann_dls::vx::SynramOnDLS>
456 GENPYBIND(stringstream)
457 friend std::ostream& operator<<(std::ostream& os,
CADCSamples const& row) SYMBOL_VISIBLE;
468 struct BackendContainerTrait<
lola::vx::CHIP_REVISION_STR::CADCSampleRow>
469 :
public BackendContainerBase<
470 lola::vx::CHIP_REVISION_STR::CADCSampleRow,
471 fisch::vx::word_access_type::Omnibus>
475 struct BackendContainerTrait<
lola::vx::CHIP_REVISION_STR::CADCSamples>
476 :
public BackendContainerBase<
477 lola::vx::CHIP_REVISION_STR::CADCSamples,
478 fisch::vx::word_access_type::Omnibus>
483 :
public BackendContainerBase<
484 lola::vx::CHIP_REVISION_STR::CADCReadoutChain,
485 fisch::vx::word_access_type::Omnibus,
486 fisch::vx::word_access_type::OmnibusChipOverJTAG>
492 template <
typename ContainerT,
typename VisitorT>
498 using halco::common::iter_all;
499 using namespace halco::hicann_dls::vx;
501 visitor(coord, config);
503 haldls::vx::CADCConfig cadc_config;
504 cadc_config.set_enable(config.ramp.enable);
505 cadc_config.set_reset_wait(config.ramp.reset_wait);
506 cadc_config.set_dead_time(config.ramp.dead_time);
507 auto const cadc_coord = coord.toCADCConfigOnDLS();
508 visit_preorder(cadc_config, cadc_coord, visitor);
510 if constexpr (!std::is_same<
512 config.ramp.enable = cadc_config.get_enable();
513 config.ramp.reset_wait = cadc_config.get_reset_wait();
514 config.ramp.dead_time = cadc_config.get_dead_time();
517 for (
auto const block : iter_all<CapMemBlockOnHemisphere>()) {
518 haldls::vx::CHIP_REVISION_STR::CapMemCell cell_v_offset(config.ramp.v_offset[block]);
519 haldls::vx::CHIP_REVISION_STR::CapMemCell cell_i_slope(config.ramp.i_slope[block]);
520 haldls::vx::CHIP_REVISION_STR::CapMemCell cell_i_bias_comp(
521 config.ramp.i_bias_comparator[block]);
522 haldls::vx::CHIP_REVISION_STR::CapMemCell cell_i_bias_vreset_buf(
523 config.ramp.i_bias_vreset_buffer[block]);
524 haldls::vx::CHIP_REVISION_STR::CapMemCell cell_v_bias_buf(
525 config.ramp.v_bias_buffer[block]);
526 haldls::vx::CHIP_REVISION_STR::CapMemCell cell_i_bias_ramp(
527 config.correlation.i_bias_ramp[block]);
528 haldls::vx::CHIP_REVISION_STR::CapMemCell cell_i_bias_store(
529 config.correlation.i_bias_store[block]);
530 haldls::vx::CHIP_REVISION_STR::CapMemCell cell_i_bias_corout(
531 config.correlation.i_bias_corout[block]);
533 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemBlockOnDLS capmem_block(
535 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemBlockOnHemisphere::size *
537 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnDLS cell_v_offset_coord(
538 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnCapMemBlock::
541 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnDLS cell_i_slope_coord(
542 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnCapMemBlock::
545 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnDLS cell_i_bias_comp_coord(
546 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnCapMemBlock::cadc_i_bias_comp,
548 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnDLS cell_i_bias_vreset_buf_coord(
549 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnCapMemBlock::
550 cadc_i_bias_vreset_buf,
552 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnDLS cell_v_bias_buf_coord(
553 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnCapMemBlock::
554 cadc_v_bias_ramp_buf,
556 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnDLS cell_i_bias_ramp_coord(
557 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnCapMemBlock::syn_i_bias_ramp,
559 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnDLS cell_i_bias_store_coord(
560 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnCapMemBlock::syn_i_bias_store,
562 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnDLS cell_i_bias_corout_coord(
563 halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemCellOnCapMemBlock::
566 visit_preorder(cell_v_offset, cell_v_offset_coord, visitor);
567 visit_preorder(cell_i_slope, cell_i_slope_coord, visitor);
568 visit_preorder(cell_i_bias_comp, cell_i_bias_comp_coord, visitor);
569 visit_preorder(cell_i_bias_vreset_buf, cell_i_bias_vreset_buf_coord, visitor);
570 visit_preorder(cell_v_bias_buf, cell_v_bias_buf_coord, visitor);
571 visit_preorder(cell_i_bias_ramp, cell_i_bias_ramp_coord, visitor);
572 visit_preorder(cell_i_bias_store, cell_i_bias_store_coord, visitor);
573 visit_preorder(cell_i_bias_corout, cell_i_bias_corout_coord, visitor);
575 if constexpr (!std::is_same<
578 config.ramp.v_offset[block] = cell_v_offset.get_value();
579 config.ramp.i_slope[block] = cell_i_slope.get_value();
580 config.ramp.i_bias_comparator[block] = cell_i_bias_comp.get_value();
581 config.ramp.i_bias_vreset_buffer[block] = cell_i_bias_vreset_buf.get_value();
582 config.ramp.v_bias_buffer[block] = cell_v_bias_buf.get_value();
583 config.correlation.i_bias_ramp[block] = cell_i_bias_ramp.get_value();
584 config.correlation.i_bias_store[block] = cell_i_bias_store.get_value();
585 config.correlation.i_bias_corout[block] = cell_i_bias_corout.get_value();
589 for (
auto const column : iter_all<CADCChannelColumnOnSynram>()) {
590 haldls::vx::CADCChannelConfig channel_config;
591 channel_config.set_offset(config.channels_causal[column].offset);
593 CADCChannelConfigOnDLS channel_coord(
594 CADCChannelConfigOnSynram(column, CADCChannelType::causal), coord.toSynramOnDLS());
595 visit_preorder(channel_config, channel_coord, visitor);
597 if constexpr (!std::is_same<
600 config.channels_causal[column].offset = channel_config.get_offset();
604 for (
auto const column : iter_all<CADCChannelColumnOnSynram>()) {
605 haldls::vx::CADCChannelConfig channel_config;
606 channel_config.set_offset(config.channels_acausal[column].offset);
608 CADCChannelConfigOnDLS channel_coord(
609 CADCChannelConfigOnSynram(column, CADCChannelType::acausal), coord.toSynramOnDLS());
610 visit_preorder(channel_config, channel_coord, visitor);
612 if constexpr (!std::is_same<
615 config.channels_acausal[column].offset = channel_config.get_offset();
620 for (
auto const synapse : iter_all<SynapseOnSynapseRow>()) {
621 auto const column = synapse.toCADCChannelColumnOnSynram();
623 auto& sw = column_correlation_row.
values[synapse];
624 sw.set_enable_internal_causal(
625 config.channels_causal[column].enable_connect_correlation);
626 sw.set_enable_internal_acausal(
627 config.channels_acausal[column].enable_connect_correlation);
628 sw.set_enable_debug_causal(config.channels_causal[column].enable_connect_debug);
629 sw.set_enable_debug_acausal(config.channels_acausal[column].enable_connect_debug);
630 sw.set_enable_cadc_neuron_readout_causal(
631 config.channels_causal[column].enable_connect_neuron);
632 sw.set_enable_cadc_neuron_readout_acausal(
633 config.channels_acausal[column].enable_connect_neuron);
636 auto const column_correlation_row_coord = coord.toColumnCorrelationRowOnDLS();
637 visit_preorder(column_correlation_row, column_correlation_row_coord, visitor);
639 if constexpr (!std::is_same<
641 for (
auto const synapse : iter_all<SynapseOnSynapseRow>()) {
642 auto const column = synapse.toCADCChannelColumnOnSynram();
644 auto const& sw = column_correlation_row.
values[synapse];
645 config.channels_causal[column].enable_connect_correlation =
646 sw.get_enable_internal_causal();
647 config.channels_acausal[column].enable_connect_correlation =
648 sw.get_enable_internal_acausal();
649 config.channels_causal[column].enable_connect_debug = sw.get_enable_debug_causal();
650 config.channels_acausal[column].enable_connect_debug =
651 sw.get_enable_debug_acausal();
652 config.channels_causal[column].enable_connect_neuron =
653 sw.get_enable_cadc_neuron_readout_causal();
654 config.channels_acausal[column].enable_connect_neuron =
655 sw.get_enable_cadc_neuron_readout_acausal();
659 haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig correlation_config;
660 correlation_config.set_sense_delay(config.correlation.sense_delay);
661 correlation_config.set_reset_duration(config.correlation.reset_duration);
662 correlation_config.set_reset_fall_time(config.correlation.reset_fall_time);
663 correlation_config.set_reset_mode(config.correlation.reset_mode);
664 correlation_config.set_cadc_v_offset_assignment(config.ramp.v_offset_assignment);
665 auto const correlation_coord = coord.toCommonCorrelationConfigOnDLS();
666 visit_preorder(correlation_config, correlation_coord, visitor);
668 if constexpr (!std::is_same<
670 config.correlation.sense_delay = correlation_config.get_sense_delay();
671 config.correlation.reset_duration = correlation_config.get_reset_duration();
672 config.correlation.reset_fall_time = correlation_config.get_reset_fall_time();
673 config.correlation.reset_mode = correlation_config.get_reset_mode();
674 config.ramp.v_offset_assignment = correlation_config.get_cadc_v_offset_assignment();
680 struct VisitPreorderImpl<
lola::vx::CHIP_REVISION_STR::CADCSampleRow>
682 template <
typename ContainerT,
typename VisitorT>
688 using halco::common::iter_all;
689 using namespace halco::hicann_dls::vx;
691 visitor(coord, config);
694 if constexpr (!std::is_same<
695 ContainerT, lola::vx::CHIP_REVISION_STR::CADCSampleRow
const>::value) {
697 CADCSampleQuad quad_config_trigger;
698 CADCSampleQuadOnDLS quad_coord_trigger(
699 CADCSampleQuadOnSynram(
701 SynapseQuadColumnOnDLS(SynapseQuadColumnOnDLS::min),
702 coord.toSynapseRowOnSynram()),
703 CADCChannelType::causal, CADCReadoutType::trigger_read),
704 coord.toSynramOnDLS());
705 visit_preorder(quad_config_trigger, quad_coord_trigger, visitor);
708 for (
auto const entry : iter_all<EntryOnQuad>()) {
709 SynapseOnSynapseRow syn_on_row(entry, SynapseQuadColumnOnDLS(0));
710 config.causal[syn_on_row] = quad_config_trigger.get_sample(entry);
716 for (
size_t i = SynapseQuadColumnOnDLS::min + 1; i <= SynapseQuadColumnOnDLS::max;
718 auto quad_column = SynapseQuadColumnOnDLS(i);
720 CADCSampleQuadOnDLS quad_coord(
721 CADCSampleQuadOnSynram(
722 SynapseQuadOnSynram(quad_column, coord.toSynapseRowOnSynram()),
723 CADCChannelType::causal, CADCReadoutType::buffered),
724 coord.toSynramOnDLS());
725 CADCSampleQuad quad_config;
726 visit_preorder(quad_config, quad_coord, visitor);
727 for (
auto const syn : iter_all<EntryOnQuad>()) {
728 SynapseOnSynapseRow syn_on_row(syn, quad_column);
729 config.causal[syn_on_row] = quad_config.get_sample(syn);
734 for (
auto quad_column : iter_all<SynapseQuadColumnOnDLS>()) {
735 CADCSampleQuadOnDLS quad_coord(
736 CADCSampleQuadOnSynram(
737 SynapseQuadOnSynram(quad_column, coord.toSynapseRowOnSynram()),
738 CADCChannelType::acausal, CADCReadoutType::buffered),
739 coord.toSynramOnDLS());
740 CADCSampleQuad quad_config;
741 visit_preorder(quad_config, quad_coord, visitor);
742 for (
auto const syn : iter_all<EntryOnQuad>()) {
743 SynapseOnSynapseRow syn_on_row(syn, quad_column);
744 config.acausal[syn_on_row] = quad_config.get_sample(syn);
752 struct VisitPreorderImpl<
lola::vx::CHIP_REVISION_STR::CADCSamples>
754 template <
typename ContainerT,
typename VisitorT>
760 using halco::common::iter_all;
761 using namespace halco::hicann_dls::vx;
763 visitor(coord, config);
766 if constexpr (!std::is_same<
767 ContainerT, lola::vx::CHIP_REVISION_STR::CADCSamples
const>::value) {
768 auto const trigger = [&](
auto& values,
auto const& loc) {
769 CADCSampleQuad quad_config_trigger;
770 CADCSampleQuadOnDLS quad_coord_trigger_top(
771 CADCSampleQuadOnSynram(
773 SynapseQuadColumnOnDLS(SynapseQuadColumnOnDLS::min),
774 SynapseRowOnSynram()),
775 CADCChannelType::causal, CADCReadoutType::trigger_read),
777 visit_preorder(quad_config_trigger, quad_coord_trigger_top, visitor);
779 for (
auto const syn : iter_all<EntryOnQuad>()) {
780 SynapseOnSynapseRow syn_on_row(
781 syn, SynapseQuadColumnOnDLS(SynapseQuadColumnOnDLS::min));
782 values[loc][syn_on_row] = quad_config_trigger.get_sample(syn);
788 trigger(config.causal, SynramOnDLS::top);
789 trigger(config.causal, SynramOnDLS::bottom);
791 auto const buffered = [&](
auto& values,
auto const& type,
auto const& loc) {
792 for (
auto quad_column : iter_all<SynapseQuadColumnOnDLS>()) {
794 if (type == CADCChannelType::causal &&
795 quad_column == SynapseQuadColumnOnDLS::min)
798 CADCSampleQuadOnDLS quad_coord(
799 CADCSampleQuadOnSynram(
800 SynapseQuadOnSynram(quad_column, SynapseRowOnSynram()), type,
801 CADCReadoutType::buffered),
803 CADCSampleQuad quad_config;
804 visit_preorder(quad_config, quad_coord, visitor);
805 for (
auto const syn : iter_all<EntryOnQuad>()) {
806 SynapseOnSynapseRow syn_on_row(syn, quad_column);
807 values[loc][syn_on_row] = quad_config.get_sample(syn);
813 buffered(config.causal, CADCChannelType::causal, SynramOnDLS::top);
814 buffered(config.acausal, CADCChannelType::acausal, SynramOnDLS::top);
815 buffered(config.causal, CADCChannelType::causal, SynramOnDLS::bottom);
816 buffered(config.acausal, CADCChannelType::acausal, SynramOnDLS::bottom);
830 lola::vx::CHIP_REVISION_STR::CADCReadoutChain::Channel,
832 enable_connect_correlation,
833 enable_connect_debug,
834 enable_connect_neuron);
836 lola::vx::CHIP_REVISION_STR::CADCReadoutChain::Ramp,
844 i_bias_vreset_buffer,
847 lola::vx::CHIP_REVISION_STR::CADCReadoutChain::Correlation,
858 EXTERN_INSTANTIATE_CEREAL_SERIALIZE_FREE(lola::vx::CHIP_REVISION_STR::CADCSampleRow)
859 EXTERN_INSTANTIATE_CEREAL_SERIALIZE_FREE(lola::vx::CHIP_REVISION_STR::CADCSamples)
BOOST_HANA_ADAPT_STRUCT(lola::vx::CHIP_REVISION_STR::CADCReadoutChain, ramp, channels_causal, channels_acausal, correlation)
halco::hicann_dls::vx::CADCSampleRowOnDLS coordinate_type
haldls::vx::CADCSampleQuad::Value Value
CADCSampleRow() SYMBOL_VISIBLE
Default constructor.
halco::common::typed_heap_array< Value, halco::hicann_dls::vx::SynapseOnSynapseRow > _samples_type
std::false_type has_local_data
haldls::vx::CADCSampleQuad::Value Value
CADCSamples() SYMBOL_VISIBLE
Default constructor.
halco::hicann_dls::vx::CADCSamplesOnDLS coordinate_type
halco::common::typed_heap_array< halco::common::typed_array< Value, halco::hicann_dls::vx::SynapseOnSynapseRow >, halco::hicann_dls::vx::SynramOnDLS > _samples_type
std::false_type has_local_data
Configuration of each CADC channel.
haldls::vx::CADCChannelConfig::Offset Offset
bool operator!=(Channel const &other) const SYMBOL_VISIBLE
bool operator==(Channel const &other) const SYMBOL_VISIBLE
CADC ramp generation settings.
haldls::vx::CHIP_REVISION_STR::CapMemCell::Value AnalogValue
bool operator!=(Ramp const &other) const SYMBOL_VISIBLE
bool operator==(Ramp const &other) const SYMBOL_VISIBLE
haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig::RampOffsets OffsetAssignment
haldls::vx::CADCConfig::DeadTime DeadTime
haldls::vx::CADCConfig::ResetWait ResetWait
haldls::vx::CHIP_REVISION_STR::CapMemCell::DisableRefresh AnalogDisableRefresh
Configuration container for CADC and correlation/neuron-readout related settings.
bool operator==(CADCReadoutChain const &other) const SYMBOL_VISIBLE
CADCReadoutChain()=default
halco::common::typed_array< haldls::vx::CHIP_REVISION_STR::CapMemCell::value_type, halco::hicann_dls::vx::CHIP_REVISION_STR::CapMemBlockOnHemisphere > AnalogValues
halco::common::typed_array< Channel, halco::hicann_dls::vx::CADCChannelColumnOnSynram > ChannelArray
Configuration of each CADC channel.
std::false_type has_local_data
halco::hicann_dls::vx::CADCOnDLS coordinate_type
bool operator!=(CADCReadoutChain const &other) const SYMBOL_VISIBLE
class GENPYBIND_TAG_LOLA_VX_VY::CADCReadoutChain CADCReadoutChain
Synapses' correlation settings, affecting correlation reset, measurement and readout,...
haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig::ResetFallTime ResetFallTime
haldls::vx::CHIP_REVISION_STR::CapMemCell::Value AnalogValue
haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig::ResetDuration ResetDuration
haldls::vx::CHIP_REVISION_STR::CapMemCell::DisableRefresh AnalogDisableRefresh
haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig::SenseDelay SenseDelay
bool operator!=(Correlation const &other) const SYMBOL_VISIBLE
bool operator==(Correlation const &other) const SYMBOL_VISIBLE
haldls::vx::CHIP_REVISION_STR::CommonCorrelationConfig::ResetMode ResetMode
static void call(ContainerT &config, lola::vx::CHIP_REVISION_STR::CADCReadoutChain::coordinate_type const &coord, VisitorT &&visitor)
static void call(ContainerT &config, lola::vx::CHIP_REVISION_STR::CADCSampleRow::coordinate_type const &coord, VisitorT &&visitor)
static void call(ContainerT &config, lola::vx::CHIP_REVISION_STR::CADCSamples::coordinate_type const &coord, VisitorT &&visitor)
halco::hicann_dls::vx::v2::AtomicNeuronOnDLS coordinate_type