Container for configuration of an ADPLL (All-Digital Phased-Locked-Loop) clock generator. More...

#include <pll.h>

Classes
struct	CoreDivM0
	Divider to set the output frequency f_clk_core0 (Together with PreDivP1). More...

struct	CoreDivM1
	Divider to set the output frequency f_clk_core1 (Together with PreDivP1). More...

struct	DcoPowerSwitch
	Number of activated PMOS header power switches during DCO operation. More...

struct	FilterShift
	Loop filter gain boost by 2^n during lock-in, leads to lock time reduction. More...

struct	LoopDivN
	Divider to set the frequency of the DCO f_dco (Together with PreDivP0). More...

struct	LoopFilterInt
	Integral part of the PID controller for the DCO. More...

struct	LoopFilterProp
	Proportional part of the PID controller for the DCO. More...

struct	PreDivP0
	Divider to set the frequency of the DCO f_dco (Together with LoopDivN). More...

struct	PreDivP1
	Divider for f_clk_core0 and f_clk_core1. More...

struct	PreDivP2
	Divider to set the output frequency f_clk_dco. More...

struct	Tune
	Tune value of the DCO. More...

Public Types
typedef halco::hicann_dls::vx::ADPLLOnDLS	coordinate_type

typedef std::true_type	is_leaf_node

enum class	Output { core_0 , core_1 , dco }
	Outputs of the ADPLL. More...

Public Member Functions
	ADPLL () SYMBOL_VISIBLE
	Default construct ADPLL. More...

double	calculate_output_frequency (Output const &output, double const &f_ref=nominal_pll_f_reference) const SYMBOL_VISIBLE
	Calculate the frequency for the different outputs on the ADPLL. More...

template<typename WordT >
void	decode (std::array< WordT, config_size_in_words > const &data) SYMBOL_VISIBLE

template<typename WordT >
std::array< WordT, config_size_in_words >	encode () const SYMBOL_VISIBLE

CoreDivM0	get_core_div_m0 () const SYMBOL_VISIBLE

CoreDivM1	get_core_div_m1 () const SYMBOL_VISIBLE

DcoPowerSwitch	get_dco_power_switch () const SYMBOL_VISIBLE

bool	get_enable () const SYMBOL_VISIBLE
	Get whether the ADPLL is enabled. More...

bool	get_enable_output_clock () const SYMBOL_VISIBLE
	Get whether output clock is enabled. More...

bool	get_enforce_lock () const SYMBOL_VISIBLE
	Get whether the PLL signal is enforced to be locked. More...

FilterShift	get_filter_shift () const SYMBOL_VISIBLE

bool	get_lock_window () const SYMBOL_VISIBLE
	Get the lock detection timing window (false: long, true: short). More...

LoopDivN	get_loop_div_n () const SYMBOL_VISIBLE

LoopFilterInt	get_loop_filter_int () const SYMBOL_VISIBLE

LoopFilterProp	get_loop_filter_prop () const SYMBOL_VISIBLE

bool	get_open_lock () const SYMBOL_VISIBLE
	Get whether open loop mode of the DCO is enabled. More...

bool	get_pfd_select () const SYMBOL_VISIBLE
	Get whether the pfd bit is set (with/without synchronizer). More...

PreDivP0	get_pre_div_p0 () const SYMBOL_VISIBLE

PreDivP1	get_pre_div_p1 () const SYMBOL_VISIBLE

PreDivP2	get_pre_div_p2 () const SYMBOL_VISIBLE

Tune	get_tune () const SYMBOL_VISIBLE

bool	get_use_external_config () const SYMBOL_VISIBLE
	TODO: What exactly gets this? More...

bool	operator!= (ADPLL const &other) const SYMBOL_VISIBLE

bool	operator== (ADPLL const &other) const SYMBOL_VISIBLE

void	set_core_div_m0 (CoreDivM0 value) SYMBOL_VISIBLE

void	set_core_div_m1 (CoreDivM1 value) SYMBOL_VISIBLE

void	set_dco_power_switch (DcoPowerSwitch value) SYMBOL_VISIBLE

void	set_enable (bool value) SYMBOL_VISIBLE
	Set to enable the ADPLL. More...

void	set_enable_output_clock (bool value) SYMBOL_VISIBLE
	Set whether to enable output clock. More...

void	set_enforce_lock (bool value) SYMBOL_VISIBLE
	Set to enforce a locked PLL signal. More...

void	set_filter_shift (FilterShift value) SYMBOL_VISIBLE

void	set_lock_window (bool value) SYMBOL_VISIBLE
	Set the lock detection timing window (false: long, true: short). More...

void	set_loop_div_n (LoopDivN value) SYMBOL_VISIBLE

void	set_loop_filter_int (LoopFilterInt value) SYMBOL_VISIBLE

void	set_loop_filter_prop (LoopFilterProp value) SYMBOL_VISIBLE

void	set_open_lock (bool value) SYMBOL_VISIBLE
	Set enable open loop mode of the DCO. More...

void	set_pfd_select (bool value) SYMBOL_VISIBLE
	Set the pfd bit (with/without synchronizer). More...

void	set_pre_div_p0 (PreDivP0 value) SYMBOL_VISIBLE

void	set_pre_div_p1 (PreDivP1 value) SYMBOL_VISIBLE

void	set_pre_div_p2 (PreDivP2 value) SYMBOL_VISIBLE

void	set_tune (Tune value) SYMBOL_VISIBLE

void	set_use_external_config (bool value) SYMBOL_VISIBLE
	TODO: What exactly sets this?. More...

Static Public Member Functions
template<typename AddressT >
static std::array< AddressT, config_size_in_words >	addresses (coordinate_type const &coord) SYMBOL_VISIBLE

Static Public Attributes
static constexpr size_t	config_size_in_words = 2

Friends
class	cereal::access

std::ostream &	operator<< (std::ostream &os, ADPLL const &config) SYMBOL_VISIBLE

Detailed Description

Container for configuration of an ADPLL (All-Digital Phased-Locked-Loop) clock generator.

The PLL features two ADPLLs with three clock outputs each. The clock outputs are routed to the PLLClockOutputBlock with four clock output ports.

Definition at line 27 of file pll.h.

Member Typedef Documentation

◆ coordinate_type

typedef halco::hicann_dls::vx::ADPLLOnDLS haldls::vx::ADPLL::coordinate_type

Definition at line 38 of file pll.h.

◆ is_leaf_node

typedef std::true_type haldls::vx::ADPLL::is_leaf_node

Definition at line 39 of file pll.h.

Member Enumeration Documentation

◆ Output

enum haldls::vx::ADPLL::Output

strong

Outputs of the ADPLL.

Enumerator
core_0
core_1
dco

Definition at line 31 of file pll.h.

Constructor & Destructor Documentation

◆ ADPLL()

haldls::vx::ADPLL::ADPLL ( )

Default construct ADPLL.

Member Function Documentation

◆ addresses()

template<typename AddressT >

static std::array<AddressT, config_size_in_words> haldls::vx::ADPLL::addresses ( coordinate_type const & coord )

static

◆ calculate_output_frequency()

double haldls::vx::ADPLL::calculate_output_frequency	(	Output const &	output,
		double const &	f_ref = `nominal_pll_f_reference`
	)		const

Calculate the frequency for the different outputs on the ADPLL.

Frequencies are returned in Hz.

Parameters

output	Ouput for which the frequency shoud be returned
f_ref	Nominal reference frequency the PLL uses as input

Returns: Frequency in Hz at specified output

◆ decode()

template<typename WordT >

void haldls::vx::ADPLL::decode ( std::array< WordT, config_size_in_words > const & data )

◆ encode()

template<typename WordT >

std::array<WordT, config_size_in_words> haldls::vx::ADPLL::encode ( ) const

◆ get_core_div_m0()

CoreDivM0 haldls::vx::ADPLL::get_core_div_m0 ( ) const

◆ get_core_div_m1()

CoreDivM1 haldls::vx::ADPLL::get_core_div_m1 ( ) const

◆ get_dco_power_switch()

DcoPowerSwitch haldls::vx::ADPLL::get_dco_power_switch ( ) const

◆ get_enable()

bool haldls::vx::ADPLL::get_enable ( ) const

Get whether the ADPLL is enabled.

Returns: Boolean value

◆ get_enable_output_clock()

bool haldls::vx::ADPLL::get_enable_output_clock ( ) const

Get whether output clock is enabled.

Returns: Boolean value

◆ get_enforce_lock()

bool haldls::vx::ADPLL::get_enforce_lock ( ) const

Get whether the PLL signal is enforced to be locked.

Returns: Boolean value

◆ get_filter_shift()

FilterShift haldls::vx::ADPLL::get_filter_shift ( ) const

◆ get_lock_window()

bool haldls::vx::ADPLL::get_lock_window ( ) const

Get the lock detection timing window (false: long, true: short).

Returns: Boolean value

◆ get_loop_div_n()

LoopDivN haldls::vx::ADPLL::get_loop_div_n ( ) const

◆ get_loop_filter_int()

LoopFilterInt haldls::vx::ADPLL::get_loop_filter_int ( ) const

◆ get_loop_filter_prop()

LoopFilterProp haldls::vx::ADPLL::get_loop_filter_prop ( ) const

◆ get_open_lock()

bool haldls::vx::ADPLL::get_open_lock ( ) const

Get whether open loop mode of the DCO is enabled.

Returns: Boolean value

◆ get_pfd_select()

bool haldls::vx::ADPLL::get_pfd_select ( ) const

Get whether the pfd bit is set (with/without synchronizer).

Returns: Boolean value

◆ get_pre_div_p0()

PreDivP0 haldls::vx::ADPLL::get_pre_div_p0 ( ) const

◆ get_pre_div_p1()

PreDivP1 haldls::vx::ADPLL::get_pre_div_p1 ( ) const

◆ get_pre_div_p2()

PreDivP2 haldls::vx::ADPLL::get_pre_div_p2 ( ) const

◆ get_tune()

Tune haldls::vx::ADPLL::get_tune ( ) const

◆ get_use_external_config()

bool haldls::vx::ADPLL::get_use_external_config ( ) const

TODO: What exactly gets this?

Returns: Boolean value

◆ operator!=()

bool haldls::vx::ADPLL::operator!= ( ADPLL const & other ) const

◆ operator==()

bool haldls::vx::ADPLL::operator== ( ADPLL const & other ) const

◆ set_core_div_m0()

void haldls::vx::ADPLL::set_core_div_m0 ( CoreDivM0 value )

◆ set_core_div_m1()

void haldls::vx::ADPLL::set_core_div_m1 ( CoreDivM1 value )

◆ set_dco_power_switch()

void haldls::vx::ADPLL::set_dco_power_switch ( DcoPowerSwitch value )

◆ set_enable()

void haldls::vx::ADPLL::set_enable ( bool value )

Set to enable the ADPLL.

Parameters

value Boolean value to set

◆ set_enable_output_clock()

void haldls::vx::ADPLL::set_enable_output_clock ( bool value )

Set whether to enable output clock.

Parameters

value Boolean value to set

◆ set_enforce_lock()

void haldls::vx::ADPLL::set_enforce_lock ( bool value )

Set to enforce a locked PLL signal.

Parameters

value Boolean value to set

◆ set_filter_shift()

void haldls::vx::ADPLL::set_filter_shift ( FilterShift value )

◆ set_lock_window()

void haldls::vx::ADPLL::set_lock_window ( bool value )

Set the lock detection timing window (false: long, true: short).

Parameters

value Boolean value to set

◆ set_loop_div_n()

void haldls::vx::ADPLL::set_loop_div_n ( LoopDivN value )

◆ set_loop_filter_int()

void haldls::vx::ADPLL::set_loop_filter_int ( LoopFilterInt value )

◆ set_loop_filter_prop()

void haldls::vx::ADPLL::set_loop_filter_prop ( LoopFilterProp value )

◆ set_open_lock()

void haldls::vx::ADPLL::set_open_lock ( bool value )

Set enable open loop mode of the DCO.

Parameters

value Boolean value to set

◆ set_pfd_select()

void haldls::vx::ADPLL::set_pfd_select ( bool value )

Set the pfd bit (with/without synchronizer).

Parameters

value Boolean value to set

◆ set_pre_div_p0()

void haldls::vx::ADPLL::set_pre_div_p0 ( PreDivP0 value )

◆ set_pre_div_p1()

void haldls::vx::ADPLL::set_pre_div_p1 ( PreDivP1 value )

◆ set_pre_div_p2()

void haldls::vx::ADPLL::set_pre_div_p2 ( PreDivP2 value )

◆ set_tune()

void haldls::vx::ADPLL::set_tune ( Tune value )

◆ set_use_external_config()

void haldls::vx::ADPLL::set_use_external_config ( bool value )

TODO: What exactly sets this?.

Parameters

value Boolean value to set

Friends And Related Function Documentation

◆ cereal::access

friend class cereal::access

friend

Definition at line 320 of file pll.h.

◆ operator<<

std::ostream& operator<<	(	std::ostream &	os,
		ADPLL const &	config
	)

friend

Member Data Documentation

◆ config_size_in_words

constexpr size_t haldls::vx::ADPLL::config_size_in_words = 2

staticconstexpr

Definition at line 309 of file pll.h.

The documentation for this class was generated from the following file:

/jenkins/jenlib_workspaces_f9/bld_nightly-haldls.YmxkX25pZ2h0bHktaGFsZGxzIzEzNzk.x/haldls/include/haldls/vx/pll.h

Classes

Public Types

Public Member Functions

Static Public Member Functions

Static Public Attributes

Friends

Detailed Description

Member Typedef Documentation

◆ coordinate_type

◆ is_leaf_node

Member Enumeration Documentation

◆ Output

Constructor & Destructor Documentation

◆ ADPLL()

Member Function Documentation

◆ addresses()

◆ calculate_output_frequency()

◆ decode()

◆ encode()

◆ get_core_div_m0()

◆ get_core_div_m1()

◆ get_dco_power_switch()

◆ get_enable()

◆ get_enable_output_clock()

◆ get_enforce_lock()

◆ get_filter_shift()

◆ get_lock_window()

◆ get_loop_div_n()

◆ get_loop_filter_int()

◆ get_loop_filter_prop()

◆ get_open_lock()

◆ get_pfd_select()

◆ get_pre_div_p0()

◆ get_pre_div_p1()

◆ get_pre_div_p2()

◆ get_tune()

◆ get_use_external_config()

◆ operator!=()

◆ operator==()

◆ set_core_div_m0()

◆ set_core_div_m1()

◆ set_dco_power_switch()

◆ set_enable()

◆ set_enable_output_clock()

◆ set_enforce_lock()

◆ set_filter_shift()

◆ set_lock_window()

◆ set_loop_div_n()

◆ set_loop_filter_int()

◆ set_loop_filter_prop()

◆ set_open_lock()

◆ set_pfd_select()

◆ set_pre_div_p0()

◆ set_pre_div_p1()

◆ set_pre_div_p2()

◆ set_tune()

◆ set_use_external_config()

Friends And Related Function Documentation

◆ cereal::access

◆ operator<<

Member Data Documentation

◆ config_size_in_words