HALDLS
haldls::vx Namespace Reference

Namespaces

 detail
 
 v2
 
 v3
 

Classes

class  AD5252ChannelConfig
 
class  AD5252ChannelConfigPersistent
 
struct  AddPickle
 Add pickle support to list of classes. More...
 
struct  AddPickle< hate::type_list< Ts... > >
 
class  ADPLL
 Container for configuration of an ADPLL (All-Digital Phased-Locked-Loop) clock generator. More...
 
class  BackgroundSpikeSource
 Background spike source on chip. More...
 
class  Barrier
 
class  BlockPostPulse
 Container to send post pulses to one half of the neurons (left/right). More...
 
class  CADCChannelConfig
 CADC container with channel-local digital offset config. More...
 
class  CADCConfig
 CADC container with global digital config for a vertical half. More...
 
class  CADCOffsetSRAMTimingConfig
 
class  CADCSampleQuad
 CADC container of four CADC samples. More...
 
class  CapMemBlock
 
class  CapMemBlockConfig
 
class  CapMemCell
 
class  ColumnCorrelationQuad
 
class  ColumnCurrentQuad
 
class  CommonCorrelationConfig
 Correlation reset and readout timing configuration container. More...
 
class  CommonNeuronBackendConfig
 Read/write access to common neuron parameters. More...
 
class  CommonPADIBusConfig
 Configuration for a PADI bus block. More...
 
class  CommonPhyConfigChip
 Container for configuration of enable values for the chip-side PHYs. More...
 
class  CommonPhyConfigFPGA
 Container for configuration of enable values for the FPGA-side PHYs. More...
 
class  CommonSTPConfig
 Common STP configuration shared by synapse drivers per vertical half. More...
 
class  CommonSynramConfig
 
class  CorrelationReset
 Container to trigger reset of correlation measurements on a synapse quad. More...
 
class  CrossbarInputDropCounter
 Crossbar input drop counter accumulating drops at all outputs for which the drop counter accumulation is enabled in the corresponding CrossbarNode. More...
 
class  CrossbarNode
 Node of the crossbar routing events from a CrossbarInputOnDLS to a CrossbarOutputOnDLS. More...
 
class  CrossbarOutputConfig
 
class  CrossbarOutputEventCounter
 Crossbar output event counter counting events routed to an output. More...
 
class  CurrentDAC
 Configuration of the current DAC of the readout chain. More...
 
class  DAC6573ChannelConfig
 
class  DACChannel
 Container for individual configuration of the value of a DAC channel of the xBoard DACs. More...
 
class  DACControl
 Container for enabling DAC channels of a xBoard DAC. More...
 
class  DifferentialWriteTrait
 Trait signalling derived-from container type support differential write operation. More...
 
class  EventRecordingConfig
 Container for the event (spikes, MADC samples) recording configuration register. More...
 
class  ExternalPPUMemoryByte
 
class  ExternalPPUMemoryQuad
 
class  FPGADeviceDNA
 Container for reading out the unique identifier of the FPGA. More...
 
struct  HasLocalData
 
struct  HasLocalData< T, typename boost::enable_if_has_type< typename T::has_local_data >::type >
 
struct  HasLocalData< T, typename boost::enable_if_has_type< typename T::is_leaf_node >::type >
 
class  HicannARQStatus
 
class  HighspeedLinkNotification
 Highspeed-Link notification from chip. More...
 
class  INA219Config
 
class  INA219Status
 
class  InstructionTimeoutConfig
 Container for the configuration of the playback instruction timeout duration. More...
 
class  JTAGClockScaler
 Container writing JTAG clock-scaler value. More...
 
class  JTAGIdCode
 Container for reading the JTAG IDCODE. More...
 
class  MADCConfig
 Configuration container for MADC and related circuitry. More...
 
class  MADCControl
 Container for MADC control state machine. More...
 
class  MADCSampleFromChip
 MADCSample from chip. More...
 
struct  NeuronBackendAddressOut
 Address of the spikes sent out by a neuron. More...
 
class  NeuronBackendConfig
 Read/write access to the NeuronBackend container. More...
 
class  NeuronBackendSRAMTimingConfig
 
class  NeuronReset
 Container to trigger reset of a single neuron. More...
 
class  NeuronSRAMTimingConfig
 
class  NullPayloadReadable
 
class  PADIEvent
 A container for the PADI event trigger register. More...
 
class  PadMultiplexerConfig
 A configuration container for the top-level readout mux, selecting the connections between an analog readout pad and different components on the chip. More...
 
class  PerfTest
 Container for enabling highspeed perf test. More...
 
class  PerfTestStatus
 Container for perf test result readout. More...
 
class  PhyConfigChip
 Container for individual configuration of chip-side PHYs. More...
 
class  PhyConfigFPGA
 Container for individual configuration of FPGA-side PHYs. More...
 
class  PhyStatus
 
class  PLLSelfTest
 Container for configuration and triggering of the PLL internal self test. More...
 
class  PLLSelfTestStatus
 Container of PLL self-test status data. More...
 
class  PollingOmnibusBlock
 Container for polling block operation on a Omnibus address. More...
 
class  PollingOmnibusBlockConfig
 
class  PPUControlRegister
 
class  PPUMemory
 
class  PPUMemoryBlock
 
class  PPUMemoryWord
 
class  PPUStatusRegister
 
class  ReadoutSourceSelection
 Configuration container for the two mux and buffer blocks for voltage readout. More...
 
class  ResetChip
 Container for setting the reset pin of the chip. More...
 
class  ResetJTAGTap
 Container for resetting JTAG state-machine. More...
 
class  ShiftRegister
 Container for configuration of the 24-bit wide shift register controlling six VDD switches, the selection of the ADC source, ADC power down and reset pins, six LEDs, routing two DAC channels to a differential debug line and the CapMem reference current connection. More...
 
class  SpikeCounterRead
 Container to read the spike counter of a single neuron. More...
 
class  SpikeCounterReset
 Container to reset the spike counter of a single neuron. More...
 
class  SpikeFromChip
 Spike from chip. More...
 
struct  SpikeLabel
 
class  SpikePack1ToChip
 
class  SpikePack2ToChip
 
class  SpikePack3ToChip
 
class  SynapseBiasSelection
 
class  SynapseCorrelationCalibQuad
 
class  SynapseDriverConfig
 
class  SynapseDriverSRAMTimingConfig
 
class  SynapseLabelQuad
 
struct  SynapseLabelValue
 Value type of a single synapse label configuration. More...
 
class  SynapseQuad
 
class  SynapseWeightQuad
 
class  SystimeSync
 Container for syncronization of chip and FPGA systime. More...
 
class  SystimeSyncBase
 Container for configuring the initial counter value of the systime counter in the chip and in the FPGA after the next systime syncronization operation. More...
 
class  TCA9554Config
 
class  TCA9554Inputs
 
class  Timer
 Container for resetting the FPGA playback timer. More...
 
class  VectorGeneratorControl
 
class  VectorGeneratorFIFOWord
 Container for writing a word of (maximally) four activation values into the FIFO in front of the vector generator. More...
 
class  VectorGeneratorLUTEntry
 Container for an entry in the lookup-table for generation of spike events from activation values. More...
 
class  VectorGeneratorNotificationAddress
 
class  VectorGeneratorTrigger
 

Typedefs

typedef hate::type_list<#define PLAYBACK_CONTAINER(Name, Type) #define LAST_PLAYBACK_CONTAINER(Name, Type) > BackendContainerList
 
typedef fisch::vx::ChipTime ChipTime
 
typedef fisch::vx::FPGATime FPGATime
 

Enumerations

enum class  Backend { PLAYBACK_CONTAINER , LAST_PLAYBACK_CONTAINER }
 Possible backends to target with PlaybackProgramBuilder::read/write. More...
 
enum class  CapMemBlockConfigIOutSelect : uint_fast8_t { disabled = 0 , i_out_mux = 1 , i_out_ramp = 2 }
 Enum inside templated class not wrapped correctly by genpybind (Issue #3699). More...
 
enum class  CapMemBlockConfigVRefSelect : uint_fast8_t { disabled = 0 , v_ref_v = 1 , v_ref_i = 2 }
 Enum inside templated class not wrapped correctly by genpybind (Issue #3699). More...
 

Functions

template<typename T >
void from_json (T &t, std::string const &s)
 
template<typename T >
void from_portablebinary (T &t, std::string const &s)
 
std::ostream & operator<< (std::ostream &, ADPLL::Output const &) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &, CurrentDAC::Sign const &) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, CapMemBlockConfigIOutSelect const &config) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, CapMemBlockConfigVRefSelect const &config) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, CommonCorrelationConfig::ResetMode const &config) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, INA219Config::ADCMode const &mode) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, ShiftRegister::AnalogReadoutMux1Input const &config) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, ShiftRegister::AnalogReadoutMux2Input const &config) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, ShiftRegister::AnalogReadoutMux3Input const &config) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, SynapseDriverConfig::RowMode const &mode) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, typename CapMemCell< halco::hicann_dls::vx::v2::Coordinates >::value_type const &value) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, typename CapMemCell< halco::hicann_dls::vx::v3::Coordinates >::value_type const &value) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, VectorGeneratorControl::Notification const &config) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, VectorGeneratorControl::Signal const &config) SYMBOL_VISIBLE
 
std::ostream & operator<< (std::ostream &os, VectorGeneratorControl::Trigger const &config) SYMBOL_VISIBLE
 
template<typename T >
std::string to_json (T const &t)
 
template<typename T >
std::string to_portablebinary (T const &t)
 
template<class ContainerT , class CoordinateT , class VisitorT >
void visit_preorder (ContainerT &config, CoordinateT const &coord, VisitorT &&visitor)
 Apply the specified visitor to all containers in a hierarchy by doing a pre-order tree traversal. More...
 

Variables

static const Timer::Value chip_reset_high_duration = Timer::Value(10)
 
static const Timer::Value chip_reset_low_duration = Timer::Value(100)
 
static constexpr uint_fast8_t minimal_madc_clock_cycles_per_sample = 12
 
static const double nominal_pll_f_reference = 5e7
 
static const Timer::Value pll_and_omnibus_settling_duration
 
static const Timer::Value reference_generator_reset_duration
 
static const Timer::Value xboard_dac_settling_duration
 

Typedef Documentation

◆ BackendContainerList

typedef hate::type_list<#define PLAYBACK_CONTAINER(Name, Type) #define LAST_PLAYBACK_CONTAINER(Name, Type) > haldls::vx::BackendContainerList

Definition at line 34 of file traits.h.

◆ ChipTime

typedef fisch::vx::ChipTime haldls::vx::ChipTime

Definition at line 151 of file event.h.

◆ FPGATime

typedef fisch::vx::FPGATime haldls::vx::FPGATime

Definition at line 150 of file event.h.

Enumeration Type Documentation

◆ Backend

enum haldls::vx::Backend
strong

Possible backends to target with PlaybackProgramBuilder::read/write.

Enumerator
PLAYBACK_CONTAINER 
LAST_PLAYBACK_CONTAINER 

Definition at line 22 of file traits.h.

◆ CapMemBlockConfigIOutSelect

enum haldls::vx::CapMemBlockConfigIOutSelect : uint_fast8_t
strong

Enum inside templated class not wrapped correctly by genpybind (Issue #3699).

Enumerator
disabled 
i_out_mux 
i_out_ramp 

Definition at line 161 of file capmem.h.

◆ CapMemBlockConfigVRefSelect

enum haldls::vx::CapMemBlockConfigVRefSelect : uint_fast8_t
strong

Enum inside templated class not wrapped correctly by genpybind (Issue #3699).

Enumerator
disabled 
v_ref_v 
v_ref_i 

Definition at line 149 of file capmem.h.

Function Documentation

◆ from_json()

template<typename T >
void haldls::vx::from_json ( T &  t,
std::string const &  s 
)

◆ from_portablebinary()

template<typename T >
void haldls::vx::from_portablebinary ( T &  t,
std::string const &  s 
)

◆ operator<<() [1/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  ,
ADPLL::Output const &   
)

◆ operator<<() [2/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  ,
CurrentDAC::Sign const &   
)

◆ operator<<() [3/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
CapMemBlockConfigIOutSelect const &  config 
)

◆ operator<<() [4/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
CapMemBlockConfigVRefSelect const &  config 
)

◆ operator<<() [5/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
CommonCorrelationConfig::ResetMode const &  config 
)

◆ operator<<() [6/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
INA219Config::ADCMode const &  mode 
)

◆ operator<<() [7/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
ShiftRegister::AnalogReadoutMux1Input const &  config 
)

◆ operator<<() [8/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
ShiftRegister::AnalogReadoutMux2Input const &  config 
)

◆ operator<<() [9/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
ShiftRegister::AnalogReadoutMux3Input const &  config 
)

◆ operator<<() [10/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
SynapseDriverConfig::RowMode const &  mode 
)

◆ operator<<() [11/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
typename CapMemCell< halco::hicann_dls::vx::v2::Coordinates >::value_type const &  value 
)

◆ operator<<() [12/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
typename CapMemCell< halco::hicann_dls::vx::v3::Coordinates >::value_type const &  value 
)

◆ operator<<() [13/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
VectorGeneratorControl::Notification const &  config 
)

◆ operator<<() [14/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
VectorGeneratorControl::Signal const &  config 
)

◆ operator<<() [15/15]

std::ostream& haldls::vx::operator<< ( std::ostream &  os,
VectorGeneratorControl::Trigger const &  config 
)

◆ to_json()

template<typename T >
std::string haldls::vx::to_json ( T const &  t)

◆ to_portablebinary()

template<typename T >
std::string haldls::vx::to_portablebinary ( T const &  t)

◆ visit_preorder()

template<class ContainerT , class CoordinateT , class VisitorT >
void haldls::vx::visit_preorder ( ContainerT &  config,
CoordinateT const &  coord,
VisitorT &&  visitor 
)

Apply the specified visitor to all containers in a hierarchy by doing a pre-order tree traversal.

Definition at line 37 of file common.h.

Variable Documentation

◆ chip_reset_high_duration

const Timer::Value haldls::vx::chip_reset_high_duration = Timer::Value(10)
inlinestatic

Definition at line 12 of file constants.h.

◆ chip_reset_low_duration

const Timer::Value haldls::vx::chip_reset_low_duration = Timer::Value(100)
inlinestatic

Definition at line 13 of file constants.h.

◆ minimal_madc_clock_cycles_per_sample

constexpr uint_fast8_t haldls::vx::minimal_madc_clock_cycles_per_sample = 12
staticconstexpr

Definition at line 25 of file constants.h.

◆ nominal_pll_f_reference

const double haldls::vx::nominal_pll_f_reference = 5e7
inlinestatic

Definition at line 19 of file constants.h.

◆ pll_and_omnibus_settling_duration

const Timer::Value haldls::vx::pll_and_omnibus_settling_duration
inlinestatic
Initial value:
=
Timer::Value(Timer::Value::fpga_clock_cycles_per_us * 100)

Definition at line 7 of file constants.h.

◆ reference_generator_reset_duration

const Timer::Value haldls::vx::reference_generator_reset_duration
inlinestatic
Initial value:
=
Timer::Value(1000)

Definition at line 14 of file constants.h.

◆ xboard_dac_settling_duration

const Timer::Value haldls::vx::xboard_dac_settling_duration
inlinestatic
Initial value:
=
Timer::Value(Timer::Value::fpga_clock_cycles_per_us * 1000)

Definition at line 10 of file constants.h.