HALDLS
pll.h
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1 #pragma once
2 #include "haldls/vx/genpybind.h"
3 #include "haldls/vx/pll.h"
4 
6 
7 using ADPLL GENPYBIND(visible) = haldls::vx::ADPLL;
8 using PLLSelfTest GENPYBIND(visible) = haldls::vx::PLLSelfTest;
10 
11 
15 class GENPYBIND(visible) PLLClockOutputBlock
16 {
17 public:
19  {
20  public:
22  ClockOutput() SYMBOL_VISIBLE;
23 
28  GENPYBIND(getter_for(enable_output))
29  bool get_enable_output() const SYMBOL_VISIBLE;
30 
35  GENPYBIND(setter_for(enable_output))
36  void set_enable_output(bool value) SYMBOL_VISIBLE;
37 
43  GENPYBIND(getter_for(enable_bypass))
44  bool get_enable_bypass() const SYMBOL_VISIBLE;
45 
51  GENPYBIND(setter_for(enable_bypass))
52  void set_enable_bypass(bool value) SYMBOL_VISIBLE;
53 
58  GENPYBIND(getter_for(select_adpll))
59  halco::hicann_dls::vx::ADPLLOnDLS get_select_adpll() const SYMBOL_VISIBLE;
60 
65  GENPYBIND(setter_for(select_adpll))
66  void set_select_adpll(halco::hicann_dls::vx::ADPLLOnDLS const& coord) SYMBOL_VISIBLE;
67 
72  GENPYBIND(getter_for(select_adpll_output))
73  ADPLL::Output get_select_adpll_output() const SYMBOL_VISIBLE;
74 
79  GENPYBIND(setter_for(select_adpll_output))
80  void set_select_adpll_output(ADPLL::Output const value) SYMBOL_VISIBLE;
81 
82  bool operator==(ClockOutput const& other) const SYMBOL_VISIBLE;
83  bool operator!=(ClockOutput const& other) const SYMBOL_VISIBLE;
84 
85  GENPYBIND(stringstream)
86  friend std::ostream& operator<<(std::ostream& os, ClockOutput const& config) SYMBOL_VISIBLE;
87 
88  private:
89  friend class cereal::access;
90  template <typename Archive>
91  void serialize(Archive& ar, std::uint32_t const version) SYMBOL_VISIBLE;
92 
93  bool m_enable_output;
94  bool m_enable_bypass;
95  halco::hicann_dls::vx::ADPLLOnDLS m_adpll;
96  ADPLL::Output m_adpll_output;
97  };
98 
99  typedef halco::hicann_dls::vx::PLLClockOutputBlockOnDLS coordinate_type;
100  typedef std::true_type is_leaf_node;
101 
102  PLLClockOutputBlock() SYMBOL_VISIBLE;
103 
109  ClockOutput const& get_clock_output(
110  halco::hicann_dls::vx::PLLClockOutputOnDLS const& coord) const SYMBOL_VISIBLE;
111 
117  void set_clock_output(
118  halco::hicann_dls::vx::PLLClockOutputOnDLS const& coord,
119  ClockOutput const& config) SYMBOL_VISIBLE;
120 
125  GENPYBIND(getter_for(spl1_source))
126  halco::hicann_dls::vx::PLLClockOutputOnDLS const& get_spl1_source() const SYMBOL_VISIBLE;
127 
132  GENPYBIND(setter_for(spl1_source))
133  void set_spl1_source(halco::hicann_dls::vx::PLLClockOutputOnDLS const& coord) SYMBOL_VISIBLE;
134 
135  bool operator==(PLLClockOutputBlock const& other) const SYMBOL_VISIBLE;
136  bool operator!=(PLLClockOutputBlock const& other) const SYMBOL_VISIBLE;
137 
138  GENPYBIND(stringstream)
139  friend std::ostream& operator<<(std::ostream& os, PLLClockOutputBlock const& config)
140  SYMBOL_VISIBLE;
141 
142  static size_t constexpr config_size_in_words GENPYBIND(hidden) = 1;
143  template <typename AddressT>
144  static std::array<AddressT, config_size_in_words> addresses(coordinate_type const& coord)
145  SYMBOL_VISIBLE GENPYBIND(hidden);
146  template <typename WordT>
147  std::array<WordT, config_size_in_words> encode() const SYMBOL_VISIBLE GENPYBIND(hidden);
148  template <typename WordT>
149  void decode(std::array<WordT, config_size_in_words> const& data) SYMBOL_VISIBLE
150  GENPYBIND(hidden);
151 
152 private:
153  friend class cereal::access;
154  template <typename Archive>
155  void serialize(Archive& ar, std::uint32_t const version) SYMBOL_VISIBLE;
156 
157  halco::common::typed_array<ClockOutput, halco::hicann_dls::vx::PLLClockOutputOnDLS> m_output;
158  bool m_switch_spl1_to_madc;
159 };
160 
161 } // namespace haldls::vx::v3
162 
163 namespace haldls::vx::detail {
164 
165 template <>
166 struct BackendContainerTrait<v3::PLLClockOutputBlock>
167  : public BackendContainerBase<
168  v3::PLLClockOutputBlock,
169  fisch::vx::word_access_type::JTAGPLLRegister,
170  fisch::vx::word_access_type::OmnibusChipOverJTAG>
171 {};
172 
173 } // namespace haldls::vx::detail
174 
#define EXTERN_INSTANTIATE_CEREAL_SERIALIZE(CLASS_NAME)
Definition: cerealization.h:75
Container for configuration of an ADPLL (All-Digital Phased-Locked-Loop) clock generator.
Definition: pll.h:28
Container for configuration and triggering of the PLL internal self test.
Definition: pll.h:371
Container of PLL self-test status data.
Definition: pll.h:502
ClockOutput() SYMBOL_VISIBLE
Default construct PLL clock output.
Container for configuration of the clock outputs of the PLL.
Definition: pll.h:16
std::true_type is_leaf_node
Definition: pll.h:100
halco::hicann_dls::vx::PLLClockOutputBlockOnDLS coordinate_type
Definition: pll.h:99
#define GENPYBIND_TAG_HALDLS_VX_V3
Definition: genpybind.h:6
Definition: arq.h:13
haldls::vx::PLLSelfTestStatus PLLSelfTestStatus
Definition: pll.h:9
haldls::vx::ADPLL ADPLL
Definition: pll.h:7
haldls::vx::PLLSelfTest PLLSelfTest
Definition: pll.h:8
Backend container trait base.
Definition: traits.h:77